Commit 19a7e794 authored by nbd's avatar nbd
Browse files

ar8216: prefix mii_xxx functions to avoid kernel namespace pollution



Prefix the exported mii_xxx32 functions with ar8xxx_
to avoid kernel namespace pollution.
Signed-off-by: default avatarHeiner Kallweit <hkallweit1@gmail.com>

git-svn-id: svn://svn.openwrt.org/openwrt/trunk@44105 3c298f89-4303-0410-b956-a3cf2f4a3e73
parent 342d6f26
......@@ -205,7 +205,7 @@ ar8xxx_phy_init(struct ar8xxx_priv *priv)
}
u32
mii_read32(struct ar8xxx_priv *priv, int phy_id, int regnum)
ar8xxx_mii_read32(struct ar8xxx_priv *priv, int phy_id, int regnum)
{
struct mii_bus *bus = priv->mii_bus;
u16 lo, hi;
......@@ -217,7 +217,7 @@ mii_read32(struct ar8xxx_priv *priv, int phy_id, int regnum)
}
void
mii_write32(struct ar8xxx_priv *priv, int phy_id, int regnum, u32 val)
ar8xxx_mii_write32(struct ar8xxx_priv *priv, int phy_id, int regnum, u32 val)
{
struct mii_bus *bus = priv->mii_bus;
u16 lo, hi;
......@@ -248,7 +248,7 @@ ar8xxx_read(struct ar8xxx_priv *priv, int reg)
bus->write(bus, 0x18, 0, page);
wait_for_page_switch();
val = mii_read32(priv, 0x10 | r2, r1);
val = ar8xxx_mii_read32(priv, 0x10 | r2, r1);
mutex_unlock(&bus->mdio_lock);
......@@ -267,7 +267,7 @@ ar8xxx_write(struct ar8xxx_priv *priv, int reg, u32 val)
bus->write(bus, 0x18, 0, page);
wait_for_page_switch();
mii_write32(priv, 0x10 | r2, r1, val);
ar8xxx_mii_write32(priv, 0x10 | r2, r1, val);
mutex_unlock(&bus->mdio_lock);
}
......@@ -286,10 +286,10 @@ ar8xxx_rmw(struct ar8xxx_priv *priv, int reg, u32 mask, u32 val)
bus->write(bus, 0x18, 0, page);
wait_for_page_switch();
ret = mii_read32(priv, 0x10 | r2, r1);
ret = ar8xxx_mii_read32(priv, 0x10 | r2, r1);
ret &= ~mask;
ret |= val;
mii_write32(priv, 0x10 | r2, r1, ret);
ar8xxx_mii_write32(priv, 0x10 | r2, r1, ret);
mutex_unlock(&bus->mdio_lock);
......
......@@ -439,9 +439,9 @@ struct ar8xxx_priv {
};
u32
mii_read32(struct ar8xxx_priv *priv, int phy_id, int regnum);
ar8xxx_mii_read32(struct ar8xxx_priv *priv, int phy_id, int regnum);
void
mii_write32(struct ar8xxx_priv *priv, int phy_id, int regnum, u32 val);
ar8xxx_mii_write32(struct ar8xxx_priv *priv, int phy_id, int regnum, u32 val);
u32
ar8xxx_read(struct ar8xxx_priv *priv, int reg);
void
......
......@@ -976,7 +976,7 @@ ar8327_wait_atu_ready(struct ar8xxx_priv *priv, u16 r2, u16 r1)
{
int timeout = 20;
while (mii_read32(priv, r2, r1) & AR8327_ATU_FUNC_BUSY && --timeout)
while (ar8xxx_mii_read32(priv, r2, r1) & AR8327_ATU_FUNC_BUSY && --timeout)
udelay(10);
if (!timeout)
......@@ -1009,19 +1009,19 @@ static void ar8327_get_arl_entry(struct ar8xxx_priv *priv,
ar8327_wait_atu_ready(priv, r2, r1_func);
mii_write32(priv, r2, r1_data0, 0);
mii_write32(priv, r2, r1_data1, 0);
mii_write32(priv, r2, r1_data2, 0);
ar8xxx_mii_write32(priv, r2, r1_data0, 0);
ar8xxx_mii_write32(priv, r2, r1_data1, 0);
ar8xxx_mii_write32(priv, r2, r1_data2, 0);
break;
case AR8XXX_ARL_GET_NEXT:
mii_write32(priv, r2, r1_func,
AR8327_ATU_FUNC_OP_GET_NEXT |
AR8327_ATU_FUNC_BUSY);
ar8xxx_mii_write32(priv, r2, r1_func,
AR8327_ATU_FUNC_OP_GET_NEXT |
AR8327_ATU_FUNC_BUSY);
ar8327_wait_atu_ready(priv, r2, r1_func);
val0 = mii_read32(priv, r2, r1_data0);
val1 = mii_read32(priv, r2, r1_data1);
val2 = mii_read32(priv, r2, r1_data2);
val0 = ar8xxx_mii_read32(priv, r2, r1_data0);
val1 = ar8xxx_mii_read32(priv, r2, r1_data1);
val2 = ar8xxx_mii_read32(priv, r2, r1_data2);
*status = val2 & AR8327_ATU_STATUS;
if (!*status)
......
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